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| Implementation | Lines of code | Time to compile for emulation | Time to debug code | Time to Optimize |
|---|---|---|---|---|
OpenCL Host: .cpp Kernel: .cl | Host: 131 Kernel: 31 | Total Time: 6hours approx. Host: 4hours approx. Kernel: 3hours approx. This time includes the time taken to write and successfully compile the code. Does not include the time to remove logical errors. | Total Time: 15 hours approx. Host: 6hours approx. Kernel: 4hours approx. This time includes the time taken to remove logical errors, to understand how to create .exe and .xclbin file and how to force SW_Emulation on SDx. Also includes the time taken to perform multiple test iterations until the right output was achieved | |
| Vivado HLS | Top Level Design Function and Test Bench: 126 | Total Time: 4hours approx. | Time to debug: 2hours approx. | |
| Verilog |