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System Description

Host name: nano.ncsa.illinois.edu

Hardware

Nodes 1-5

  • SuperMicro SYS-4028GR-TR
    • X10DRG-O+-CPU motherboard
    • 2x Intel Xeon CPU E5-2620 v3 @ 2.40GHz
    • 128 GB DDR4 (8x 16 GB Micron 2133 MHz 36ASF2G72PZ-2G1A2)
    • 8 PCI-E 3.0 ports, switched
  • Mellanox MT27500 Family [ConnectX-3] IB
  • 1x 300GB and 1x 1 TB HDDs

  • 8x Fiji Radeon R9 FURY / NANO Series
    • 4096 cores
    • 4GB HBM

Node 6

  • 1x NVIDIA P100
    • 512 cores
    • 5 GB GDDR5

Software

  • CentOS 7
  • CUDA 8.0
  • PGI 16.10
  • Intel FPGA OpenCL 16.1
    • emulation environment only

 

Need pictures

Projects

1. Evaluation of OpenCL design flow for Altera/Intel FPGAs

  • Start date: 02/2017
  • End date: TBD
  • PI: Kindratenko
    • Users: kindr, rrthakk2, hequ2
  • Objective: Study OpenCL FPGA design flow. Port sample applications and evaluate design flow maturity and ease of use.
  • Current status
    • 03/09/17: Work in progress.  hequ2 and rrthakk2 are re-working two different applications to OpenCL.
  • Open issues
    • need license to compile for actual hardware

2. DISSCO parallel code testing platform

  • Start date: 03/2017
  • End date: TBD
  • PI: Sever Tipei
    • Users: sever
  • Objective: Provide platform for infrequent testing of parallel version of DISSCO software.
  • Current status
    • 03/09/17: Access granted.
  • Open issues
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