Date: Fri, 29 Mar 2024 00:57:20 -0500 (CDT) Message-ID: <914876335.1508.1711691840949@wiki.ncsa.illinois.edu> Subject: Exported From Confluence MIME-Version: 1.0 Content-Type: multipart/related; boundary="----=_Part_1507_381590983.1711691840947" ------=_Part_1507_381590983.1711691840947 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Content-Location: file:///C:/exported.html
We are be investigating a heterogeneous platform for deep learning in wh= ich GPUs are applied for training and FPGAs are initially used for inferenc= e, and later on will be adapted for training with customizable data types. = Ultimately, we will be looking at how to utilize both GPUs and FPGAs for tr= aining and inference in a tightly coupled system.
Yiyu Tan, RIKEN AICS, research scientist
Volodymyr Kindratenko, NCSA, senior research scientist
Proposal: JLESC_co= llaboration_proposal.pdf
System at NCSA: Xilinx Kintex UltraScale FPGA KCU1500= Acceleration Development Kit
SDK documentation: htt= ps://www.xilinx.com/products/design-tools/software-zone/sdaccel.html
Running tools on iridium:
sdx &am= p;
Copy examples to your own space:
cd ~/pr= oject cp -r /opt/Xilinx/SDx/2017.1/samples . cp -r /opt/Xilinx/SDx/2017.1/examples .
Tutorials: https://w=
ww.xilinx.com/html_docs/xilinx2017_2/sdaccel_doc/index.html
Examples=
: https://github.com/Xilinx/SDAccel_Examples
Development documenttion
Hardware-related